Specifications
| Publisher | Morgan Kaufmann |
| ISBN 13 | 9780128200643 |
| ISBN 10 | 0128200642 |
| Author | Sarah Harris |
| Book Format | Paperback |
| Language | English |
| Book Description | The newest addition to the Harris and Harris family of Digital Design and Computer Architecture books, this RISC-V Edition covers the fundamentals of digital logic design and reinforces logic concepts through the design of a RISC-V m |
| About the Author | Sarah L. Harris is an Assistant Professor of Engineering at Harvey Mudd College. She received her Ph.D. and M.S. in Electrical Engineering from Stanford University. Before attending Stanford, she received a B.S. in Electrical and Computer Engineering from Brigham Young University. Sarah has also worked with Hewlett-Packard, the San Diego Supercomputer Center, Nvidia, and Microsoft Research in Beijing. Sarah loves teaching, exploring and developing new technologies, traveling, wind surfing, rock climbing, and playing the guitar. Her recent exploits include researching sketching interfaces for digital circuit design, acting as a science correspondent for a National Public Radio affiliate, and learning how to kite surf. She speaks four languages and looks forward to learning more in the near future.David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Broadcom, and other design companies. David holds more than a dozen patents and is the author of three other textbooks on chip design, as well as many Southern California hiking guidebooks. When he is not working, he enjoys hiking, flying, and making things with his three sons. |
| Publication Date | 2021-11-03 |
| Number of Pages | 592 pages |
Digital Design and Computer Architecture, RISC-V Edition
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